期刊文献+

模拟神经网络传输的职业教育视频资源开发 预览

Development of Video Resources in Vocational Education Based on Simulated Neural Network Transmission
在线阅读 下载PDF
分享 导出
摘要 面对职业教育视频资源在传输过程中网络结构和硬件资源占用关系这一问题,论文利用矩阵乘法改进了全连接深度神经网络(DNN)的矩阵计算形式,以此动态模拟职业教育视频资源传输状态。将矩阵乘法引入DNN前向传播过程使计算简化,以探究职业教育视频资源库作为硬件实现平台,基于乘累加器IP核与乘加器IP核设计了两种矩阵乘法计算架构,实现了模拟全连接DNN前向传播的职业教育视频资源传输计算过程,并对两种方案在实现不同结构的前向传播计算时的硬件资源占用情况进行对比,得出结论:在实现相同网络的视频资源传播计算情况下,乘累加器方案比乘加器方案消耗更少的硬件资源。 In the face of the problem of network structure and hardware resource occupancy in video transmission in vocational education,this paper uses matrix multiplication to improve the matrix calculation form of full connection depth neural network(DNN)to dynamically simulate the video resources of vocational education Transmission status.The matrix multiplication is introduced into the DNN forward propagation process to simplify the calculation to explore the vocational education video resource library as the hardware implementation platform.Based on the accumulator IP core and the multiplier IP core,two matrix multiplication algorithms are designed to realize the simulation connecting the DNN forward communication of the vocational education video resource transmission calculation process,and the two programs in the realization of the different structure of the forward communication calculation of hardware resource occupancy compared to the conclusion:in the realization of the same network of video resource propagation calculation in the case of a multiplier,the multiplier scheme consumes less hardware resources than the multiplier scheme.
作者 梁建胜 袁从贵 LIANG Jiansheng[1];YUAN Conggui[2]([1]Information and Education Technology Center,Dongguan Polytechnic,Dongguan 523808;[2]Department of Electronic Engnieering,Dongguan Polytechnic,Dongguan 523808)
出处 《计算机与数字工程》 2018年第7期1410-1416,共7页 Computer & Digital Engineering
基金 广东省自然科学基金项目(编号:2015A030310257)资助。
关键词 视频资源 矩阵乘法 DNN前向传播 资源优化 硬件资源占用 video resource matrix multiplication DNN forward propagation resource optimization hardware resource occupation
作者简介 梁建胜,男,硕士,助理研究员,研究方向:教育技术应用与视频技术开发。;袁从贵,男,博士,副教授,研究方向:机器学习,非线性系统建模及控制。
  • 相关文献

参考文献14

二级参考文献169

  • 1金晶,唐丽娟,朱丹.农村远程教育中微课教学资源的制作与推广[J].湖南农业科学:上半月,2013(9):116-119. 被引量:7
  • 2荣瑜,朱恩.一种高性能FFT蝶形运算单元的设计[J].东南大学学报:自然科学版,2007,37(4):565-568. 被引量:16
  • 3徐志军.CPLD/FPGA开发与应用[M].北京:电子工业出版社,2002.. 被引量:6
  • 4颜晓东,李树国.二次Booth编码的大数乘法器设计[J].清华大学学报:自然科学版,2007,47(10):1681-1684. 被引量:3
  • 5Jeon D, Seok M, Chakrabarti C, et al. A super-pipelined energy efficient subthreshold 240 MS/s FFT Core in 65 nm CMOS [ J]. IEEE Journal of Solid-State Circuits,2012, 47( 1 ) :23-34. 被引量:1
  • 6Mukherjee R, Keyur S,Sandeep E,et al. FPGA based im- plementation of quantization and its inverse for H. 264 co- dec [C] //Proceedings of 2013 IEEE Conference on In- formation & Communication Technologies ( ICT2013 ). JeJu Island : IEEE,2013:986-989. 被引量:1
  • 7Gothandaraman A, Peterson G D, Warren G L, et al. A pipelined and parallel architecture for quantum Monte Carlo simulations on FPGAs [ J]. VLSI Design, 2010, 2010:946486/1-8. 被引量:1
  • 8Reddy S K,Sahoo S K, Chakraborty S. A high speed,high radix 32-bit redundant parallel multiplier [ C] //Proceed-ings of International Conference on Emerging Trends in Electrical and Computer Technology ( ICETECT ) 201 1. Tamil N adu : IEEE,2011:917- 921. 被引量:1
  • 9Kumar Kattamuri R S N, Sahoo S K. Computation sharing multiplier using redundant binary arithmetic [ C] //Proceed- ings of IEEE Asia Pacific Conference on Circuits and Sys- tems ( APCCAS ). Kuala Lumpur: IEEE,2010 : 108-111. 被引量:1
  • 10Gonze1ez A F, Mazumder P. Redundant arithmetic, algo- rithms and implementations [ J ]. Integration, the VLSI Journal,2000,30 ( 1 ) : 13-53. 被引量:1

共引文献82

投稿分析

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部 意见反馈